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[VHDL-FPGA-Verilog] SDRAM_96M

Description: 基于FPGA的SDRAM串口实验，verilog语言写的，附件里是做实验的工程，连上串口，下进去就有数据了，波特率9600，一个停止位，SDRAM时钟是96MHz，数据时FPGA自动产生的，正确输出结果是00到FF递增一，再循环。这个工程警告比较少，基本是故意为之的警告，时序也已经收敛。-FPGA-based SDRAM serial experiments, verilog language written annex is to do the experiment works, even on the serial port, the data will have to go under, 9600 baud, one stop bit, SDRAM clock is 96MHz, automatically generated data FPGA the correct result is output to the FF 00 is incremented by one, recycle. The project is relatively small warning, a warning is intentionally basic timing also has converged.
Platform: | Size: 5591040 | Author: Grace | Hits:

[VHDL-FPGA-Verilog] CD1_PHOTO_ABLUM_1280

Description: 基于FPGA的数码像册实验，使用了NIOS做文件系统和JPEG图像解码FPGA和SDRAM做了图像缓存-Based on the FPGA digital image book experiment, using the NIOS to do file system and JPEG image decoding FPGA and SDRAM do the image cache
Platform: | Size: 3013632 | Author: 丁 | Hits:

[VHDL-FPGA-Verilog] CD1_PHOTO_ABLUM_1920

Description: 使用FPGA做的数码相册实验，用NIOS做了FAT32文件系统和JPEG图像解码,FPGA和SDRAM做了显示的缓存-Using FPGA to do the digital album experiment, using NIOS to do the FAT32 file system and JPEG image decoding, FPGA and SDRAM to do the display cache
Platform: | Size: 3911680 | Author: 丁 | Hits:

[VHDL-FPGA-Verilog] CD1_MT9M034_DISPLAY_SAVE

Description: 基于FPGA的MT9M034图像采集显示并存在TF卡是的例程，FPGA和SDRAM完成了RAW图像的采集和转成RGB，并通过VGA显示。NIOS完成了RGB图像存成BMP图像的功能和CMOS的IIC配置-Based on FPGA MT9M034 image acquisition and displayed and TF card is routines, FPGA and SDRAM completed the acquisition of raw image and convert the RGB, and VGA display. NIOS completed the RGB image stored as a function of the BMP image and IIC CMOS configuration
Platform: | Size: 6887424 | Author: 丁 | Hits:

[VHDL-FPGA-Verilog] ALTERA_FPGA_SDRAM

Description: 使用ALTERA的FPGA控制SDRAM的verilog程序-Use ALTERA s FPGA to control SDRAM s verilog program
Platform: | Size: 13050880 | Author: 李 | Hits:

[ARM-PowerPC-ColdFire-MIPS] stm324xg_eval_fsmc_sram

Description: stm32f4 SRAM驱动程序，用于与FPGA通迅，验证通过(Stm32f4 SDRAM driver)
Platform: | Size: 2048 | Author: liaub07 | Hits:

[VHDL-FPGA-Verilog] 自己动手写CPU

Description: ? Code文件夹 提供了本书每一章涉及的OpenMIPS源代码、测试程序。 ? Tools文件夹 提供了GNU工具链的安装文件，以及一个小工具Bin2Mem.exe，该工具用来将二进制数文件转化为可以用于ModelSim仿真的格式。 ? Doc文件夹 提供了本书使用的一些IP核的说明手册，包括UART控制器、SDRAM控制器、GPIO模块等。还提供了FPGA开发平台DE2的说明手册。(Code folder Provides the OpenMIPS source code and test program for each chapter of this book. Tools folder Provides an installation file for the GNU tool chain, and a small tool called Bin2Mem.exe that converts binary number files into formats that can be used for ModelSim emulation. Doc folder Some manuals for IP kernel are provided in this book, including UART controller, SDRAM controller, GPIO module and so on. An instruction manual for the FPGA development platform, DE2, is also provided.)
Platform: | Size: 93768704 | Author: 灰太狼的初恋 | Hits:

[VHDL-FPGA-Verilog] NIOS interface with SD card SPI

Description: So, the project is attached. Implemented NIOS2 processor on SOPC Quartus 11.1, uses SDRAM (on chip project in this version does not fit) SPI interface is used for communication between Nios and SD card (3 fpga outputs, one fpga input) Accordingly, it opens the message.txt file on the SD card and outputs its contents to the console, creates a file, fills it in, gives a list of files in the root.
Platform: | Size: 157645 | Author: hemamont@mail.ru | Hits:
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